Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

We fabricated CMOS devices on Ultra-Thin Boby and Buried Oxide SOI wafers using a single mid-gap gate stack. Excellent global, local and intrinsic VT-variability performances are obtained (AVT=1.45mV.µm). This leads to 6T-SRAM cells with good characteristics down to VDD=0.5V supply voltage and with excellent Static Noise Margin (SNM) dispersion across the wafer (σSNM<SNM/6) down to VDD=0.7V. We also demonstrate ultra-low leakage (<0.5pA/µm) on UT2B devices at LG= 30nm by source/back biasing thanks to a low gate current and Gate Induced Drain Lowering (GIDL).