Concurrent processes synchronisation in statecharts for FPGA implementation

In this paper useful methods of concurrent processes synchronization in UML state machine diagrams are presented. It is not easy to transform complex behaviour description into statecharts, even if the formal specification has already been given, for example as a hierarchical Petri net. Both graphical forms of specifications can be used simultaneously, especially when overlapped concurrent processes are considered. The authors specify the behaviour of an industrial chemical controller as a case study to demonstrate the way of transforming the verbal specification through a formal Petri net model into the UML format, which is more and more frequently understood and widely accepted by industry. The diversification of description gives a chance that the obtained design result, which can be seen both from theoretical and practical points of view, will be correct. The specification is considered from a reconfigurable hardware implementation side and a digital design methodology. It is based on hierarchical concurrent state machine implementation through state encoding into mapping into FPGA matrices, supported by hardware description languages, for example VHDL. In the paper some effective process synchronization methods are included: by introducing global variables and using UML graphical synch states accepted by the UML standard. The proposed methodology is fully supported by system HiCoS, developed at the University of Zielona Góra for a rapid prototyping of reconfigurable logic controllers.