DocumentCode :
3640727
Title :
Fast video decoder for low-cost embedded CPUs: A software solution and a case study
Author :
Bojan Mrazovac;Milan Z. Bjelica;Nikola Teslić
Author_Institution :
Faculty of Technical Sciences, University of Novi Sad, Novi Sad, Serbia
fYear :
2010
Firstpage :
228
Lastpage :
231
Abstract :
This paper presents an optimized software solution for fast video decoding, which can be easily integrated into systems that lack hardware support for parallel video processing. These systems are usually based on a single low processing power hardware decoder, which is in charge of processing one video stream. If it is required to decode two different video streams in parallel, decoder as such one would not be enough. In this paper we present a cheap and simple video decoder which decodes and displays another video stream, thus allowing parallel visualization of two video streams. The decoder utilizes modified MPEG-2 decoding algorithm, which decodes and displays only certain frames (I-frames) and their elements (DC coefficients per each block of pixels). DC coefficients of each I-frame are collected in order to create a picture. Described approach is applied for a digital TV set-top box as a support for Picture-in-Picture functionality. Presented approach follows the inability of the target system to use the conventional MPEG-2 decoding algorithm, due to its real-time constraints.
Keywords :
"Decoding","Streaming media","Transform coding","Discrete cosine transforms","TV","Pixel","Software"
Publisher :
ieee
Conference_Titel :
Circuits and Systems for Communications (ECCSC), 2010 5th European Conference on
Print_ISBN :
978-1-61284-400-8
Type :
conf
Filename :
5733898
Link To Document :
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