DocumentCode :
3640846
Title :
COMPAS — Advanced test compressor
Author :
Jirí Jenícek;Ondrej Novák
Author_Institution :
Technical University of Liberec, Czech Republic
fYear :
2010
Firstpage :
543
Lastpage :
548
Abstract :
This paper describes the compression method that is used for test pattern compaction and compression in algorithm called COMPAS, which utilizes a test data compression method based on pattern overlapping. This algorithm reorders and compresses deterministic test patterns previously generated in an ATPG by overlapping them. COMPAS is able to use distributed ATPG processing and compress test data for various fault models. Independency of COMPAS on used ATPG is discussed and verified. The compressor preprocesses the input data to determine the degree of random test resistance for each fault. This allows to reorder the test patterns more efficiently and results to 10% compression ratio improvement in average. Compressed data sequence is well suited for decompression by the scan chains in the embedded tester cores.
Keywords :
"Circuit faults","Automatic test pattern generation","Resistance","Integrated circuit modeling","Algorithm design and analysis","Encoding"
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (EWDTS), 2010 East-West
Print_ISBN :
978-1-4244-9555-9
Type :
conf
DOI :
10.1109/EWDTS.2010.5742114
Filename :
5742114
Link To Document :
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