• DocumentCode
    36413
  • Title

    A Parallel Quantum Histogram Architecture

  • Author

    Megson, G.M. ; Cadenas, J.O. ; Sherratt, R. ; Huerta, P. ; Kao, W.C.

  • Author_Institution
    Sch. of Electron. & Comput. Sci., Univ. of Westminster, London, UK
  • Volume
    60
  • Issue
    7
  • fYear
    2013
  • fDate
    Jul-13
  • Firstpage
    437
  • Lastpage
    441
  • Abstract
    A parallel formulation of an algorithm for the histogram computation of n data items using an on-the-fly data decomposition and a novel quantum-like representation (QR) is developed. The QR transformation separates multiple data read operations from multiple bin update operations, thereby making it easier to bind data items into their corresponding histogram bins. Under this model, the steps required to compute the histogram is n/s + t steps, where s is a speedup factor, and t is associated with pipeline latency. Here, we show that an overall speedup factor s is available for up to an eightfold acceleration. Our evaluation also shows that each of these cells requires less area/time complexity compared to similar proposals found in the literature.
  • Keywords
    parallel architectures; quantum computing; on-the-fly data decomposition; parallel quantum histogram architecture; pipeline latency; quantum-like representation; speedup factor; Histogram; parallel algorithms; parallel architectures; quantum representation;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2013.2258263
  • Filename
    6508854