Test vector overlapping based compression tool for narrow test access mechanism

This paper describes an algorithm, which utilizes a test data compression method based on test vector overlapping to compact and compress test patterns. The algorithm takes deterministic test vectors previously generated in an ATPG and compresses them by reordering and overlapping them. It is able to speed up the test generation process by using distributed ATPG processing and compress test data for various fault models. Independency of the algorithm on used ATPG is discussed and verified, the compressor is able to cooperate with industry workflow tools using Verilog and STIL formats. The compressor preprocesses the input data to determine the degree of random test resistance for each fault. This optional step allows to rearrange the test vectors more efficiently and results to 10% compression ratio improvement in average.