DocumentCode :
3641386
Title :
BSIM-CG: A compact model of cylindrical gate / nanowire MOSFETs for circuit simulations
Author :
V. Sriramkumar;Darsen D. Lu;Tanvir H. Morshed;Yukiya Kawakami;Peter M. Lee;Ali M. Niknejad;Chenming Hu
Author_Institution :
Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720 USA
fYear :
2011
fDate :
4/1/2011 12:00:00 AM
Firstpage :
1
Lastpage :
2
Abstract :
A full-fledged surface potential based compact model for cylindrical gate transistors replete with physical effects such as polysilicon gate depletion, mobility degradation, quantum mechanical effects, short channel effects, leakage currents, and parasitic resistances and capacitances etc. is presented. For the first time we present calibration results of such a model to a cylindrical gate technology that exhibits asymmetric i-v characteristics.
Keywords :
"Logic gates","Integrated circuit modeling","Capacitance","Semiconductor process modeling","FETs","Doping","Threshold voltage"
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems and Applications (VLSI-TSA), 2011 International Symposium on
ISSN :
1524-766X
Print_ISBN :
978-1-4244-8493-5
Type :
conf
DOI :
10.1109/VTSA.2011.5872259
Filename :
5872259
Link To Document :
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