DocumentCode :
3641611
Title :
Chip design for intelligent data classification algorithms and implementation on an FPGA: A case study to classify EMG signals
Author :
Erdem Alkim;Erdal Kiliç
Author_Institution :
Bilgisayar Mü
fYear :
2011
fDate :
4/1/2011 12:00:00 AM
Firstpage :
307
Lastpage :
310
Abstract :
FPGA chips stand out with parallel processing capabilities. Besides this, artificial neural networks require parallel computing because of their algorithm. In this study, it is aimed to design an artificial neural network chip, the designed chip algorithm is implemented on an FPGA chip. Artificial neural network model is chosen as the Learning Vector Quantization (LVQ), and this model is used for the prediction of the four movements (up, down, open, close) from electromyogram (EMG) signals taken from the muscles. In order to create the chip, decision-making algorithm is developed firstly, and this algorithm is finally tested on the ALTERA DE2 demo board by using verilog HDL.
Keywords :
"Electromyography","Field programmable gate arrays","Artificial neural networks","Hardware design languages","Conferences","Signal processing","Prediction algorithms"
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications (SIU), 2011 IEEE 19th Conference on
ISSN :
2165-0608
Print_ISBN :
978-1-4577-0462-8
Type :
conf
DOI :
10.1109/SIU.2011.5929648
Filename :
5929648
Link To Document :
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