DocumentCode :
3641738
Title :
A reconfigurable H.264 video encoder hardware
Author :
Ilker Hamzaoglu;Aydın Aysu;Onur Can Ulusel
Author_Institution :
fYear :
2011
fDate :
4/1/2011 12:00:00 AM
Firstpage :
984
Lastpage :
987
Abstract :
Motion Estimation (ME) is the most computationally intensive part of video compression systems. Multiple reference frame (MRF) ME used in H.264 standard increases the video coding efficiency at the expense of increased computational complexity and power consumption. Therefore, in this paper, we present a reconfigurable baseline H.264 video encoder hardware in which the number of reference frames used for MRF ME can be configured based on the application requirements in order to trade-off video coding efficiency and power consumption. The proposed H.264 video encoder hardware is based on an existing low cost H.264 intra frame coder hardware and it includes new reconfigurable MRF ME, mode decision and motion compensation hardware. The proposed H.264 video encoder hardware is capable of processing 55 CIF (352×288) frames per second and its power consumption ranges between 115 mW and 235 mW depending on the number of reference frames used for MRF ME.
Keywords :
"Hardware design languages","Hardware","Joints","Signal processing","Conferences","Transform coding","Field programmable gate arrays"
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications (SIU), 2011 IEEE 19th Conference on
ISSN :
2165-0608
Print_ISBN :
978-1-4577-0462-8
Type :
conf
DOI :
10.1109/SIU.2011.5929818
Filename :
5929818
Link To Document :
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