Title :
Intra prediction hardware module for high-profile H.264/AVC encoder
Author :
Mikołaj Roszkowski;Grzegorz Pastuszak
Author_Institution :
Institute of Radioelectronics, Warsaw University of Technology, Poland
Abstract :
This paper presents an efficient architecture of INTRA prediction module for the high-profile H.264/AVC encoder. The designed module supports all possible INTRA prediction modes in real-time, for video sequences of formats up to 1080p@25fps, while working at only 100 MHz. Processing is based on 4x4 blocks, and one prediction mode for the whole 4x4 block is determined in one clock cycle. The design has been verified to be fully compliant with H.264/AVC High Profile, except for MBAFF frame processing mode. The architecture is synthesized for FPGA Stratix 2 and Virtex 5 devices and the AMS 0.35 µm technology. The maximal operating frequency is at least 100 MHz.
Keywords :
"Clocks","Mathematical model","Equations","Encoding","Computer architecture","Adders","Random access memory"
Conference_Titel :
Signal Processing Algorithms, Architectures, Arrangements, and Applications Conference Proceedings (SPA), 2010
Print_ISBN :
978-1-4577-1485-6