DocumentCode :
3642413
Title :
FPGA Soft Error Recovery Mechanism with Small Hardware Overhead
Author :
Uros Legat;Anton Biasizzo;Franc Novak
Author_Institution :
Jozef Stefan Inst., Ljubljana, Slovenia
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
207
Lastpage :
207
Abstract :
We propose a low hardware overhead mechanism for internal FPGA configuration check and repair. The approach is effective against soft errors in the configuration memory (i.e., the errors caused by high energy radiation also known as Single Event Upsets). The proposed recovery mechanism occupies less hardware resources and has the shortest fault recovery time than the solutions reported so far.
Keywords :
"Hardware","Field programmable gate arrays","Flip-flops","Random access memory","Clocks","Error correction codes","Single event upset"
Publisher :
ieee
Conference_Titel :
European Test Symposium (ETS), 2011 16th IEEE
ISSN :
1530-1877
Print_ISBN :
978-1-4577-0483-3
Type :
conf
DOI :
10.1109/ETS.2011.36
Filename :
5957953
Link To Document :
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