Selected solutions in Printed Circuit Boards for silicon detector readout integrated circuits testing

The design of the PCBs (Printed Circuit Board) for testing naked die integrated circuits involves a series of tradeoffs. On the one hand the test setup should be as flexible as possible to provide means to diagnose or debug it during the first start-up, slightly modify the circuit for the second-step testing and should be accessible for an easy probe connection etc. On the other hand the circuit should be interference-proof and fully exploit the ASIC´s capabilities. Enough to say that poorly designed PCB for the mixed-signal low-power, low-noise integrated circuit can successfully compromise the possible good noise-performance. This paper presents some solutions implemented by the author in test PCBs for the silicon detector readout integrated circuits designed at the AGH-UST ASIC design group.