Priority of instructions execution and DFG mapping techniques of computer architecture with data driven computation model

The article introduces proposed computer architecture with data driven computation model based on principles of tile computing as the modern approach to multi-core design of microprocessors. Special attention is paid to the description of characteristics of architecture, which are priority of instructions execution with coloring of instruction priorities, data flow graph mapping technique and multi-mapping technique, which are proposed within this architecture. Architecture is developed at the Department of Computers and Informatics, Faculty of Electrical Engineering and Informatics, Technical University of Košice. The work is one of reached results within projects APVV-0008-10 and KEGA project No. 3/7110/09, being solved at the Department of Computers and Informatics, Faculty of Electrical Engineering and Informatics, Technical University of Košice.