Injection-locked clock receiver for monolithic optical link in 45nm SOI

This paper presents a compact, low-power injection-locked clock receiver for large-scale integrated optical interconnects. The injection-locked design provides high input sensitivity when compared to the TIA-less integrating clock receiver design. It also breaks the gain/bandwidth tradeoff of a traditional transimpedance amplifier (TIA) receiver, with a self-adjusting mechanism to increase robustness. The receiver is designed in 45nm SOI and shown to operate from 1.0 GHz to 3.0 GHz while consuming from 186μW to 444 μW, with an input sensitivity from 8.6μA to 33.2μA and output jitter σ within 1 %UI.