BIST for SI sigma-delta analogue front end

A design methodology for built-in self test of switched-current (SI) oversampling sigma-delta analogue front ends is presented. The self-testing scheme enables to convert a sigma-delta modulator to form a delay line and perform self-testing without disconnection of feedback loops. Simulations of structural faults show high fault coverage for the proposed method. An analysis for more subtle designs has been made.