An Energy-Efficient VLSI Architecture for Cognitive Radio Wideband Spectrum Sensing

Spectrum sensing over a wide bandwidth increases the probability of finding unutilized spectrum for cognitive radios. However, energy-efficient VLSI realization of wideband sensing algorithms is challenging due to complex signal processing and real-time requirement. In addition, strong primary users introduce spectral leakage in adjacent unused bands, resulting in sensing performance degradation. To address these challenges, we propose a cascaded filter-bank channelization scheme and its reconfigurable VLSI architecture that can be optimized for power, area, sensing time, and detection performance. In addition, the spectral leakage due to strong interference is compensated with an interference cancellation method. Compared to the conventional PSD-based energy detection, the proposed channelization scheme supports reliable wideband signal detection with 2.5× less power. Given a 0.5ms sensing time under 30-dB adjacent-band interference-to-noise ratio, a 30× sensing-time improvement is achieved while maintaining a false- alarm probability of 0.1 and a detection probability of 0.9. The energy efficiency is improved from lower power consumption and reduced sensing time.