Heat dissipation bounds for nanocomputing: Theory and application to QCA

Computing circuits that implement logically irreversible operations unavoidably dissipate heat. The resulting dissipative costs, while insignificant in CMOS technology, may be dominant or even prohibitive in some dense, high speed post-CMOS nanocomputing approaches. This motivates determination of lower bounds on the dissipative cost of computation that can be applied to concrete nanocomputing technology proposals. In this work, we outline a general approach for the determination of such bounds and illustrate its application to a half adder circuit implemented in quantum cellular automata (QCA) controlled using both Landauer and Bennett clocking schemes that support pipelining. The resulting bounds on energy dissipation are used to compare lower bounds on power dissipation for the two clocking schemes at a fixed computational throughput. Potential application of our approach to assessment of post-CMOS nanocomputing technologies, both transistor-based and non-transistor based, is briefly discussed.