ANNSyS (an analog neural network synthesis system)

We present an analog neural network synthesis system based on a circuit simulator and a silicon assembler for neural networks. The circuit simulator makes use of the fact that neural networks with multilayer perceptron architecture consist of many decoupled blocks if the blocks are designed in MOS technology. We implement on-chip training on the software by incorporating the Madaline Rule III into our simulator. The assembler generates the layout by reading the standard cells from a library once the architecture of the network is given.