DocumentCode :
3646114
Title :
Wafer-level high density integration of surface mount technology components in through-silicon trenches
Author :
Ji Hao Hoo;Kwang Soon Park;Qağdaş Varel;Rajashree Baskaran;Karl F. Böhringer
Author_Institution :
University of Washington, Seattle, WA, USA
fYear :
2012
Firstpage :
373
Lastpage :
376
Abstract :
This paper reports a novel method to deliver and assemble standard 01005 format (0.016” × 0.008”, 0.4 mm × 0.2 mm) monolithic ceramic capacitors and thin-film resistors into through-wafer trenches, with a batch assembly process that can guarantee 100% assembly. This process is CMOS compatible and is competitive with capacitors and resistors fabricated through standard foundry processes.
Keywords :
"Capacitors","Assembly","Arrays","Capacitance","Foundries","Resistors","Metallization"
Publisher :
ieee
Conference_Titel :
Micro Electro Mechanical Systems (MEMS), 2012 IEEE 25th International Conference on
ISSN :
1084-6999
Print_ISBN :
978-1-4673-0324-8
Type :
conf
DOI :
10.1109/MEMSYS.2012.6170161
Filename :
6170161
Link To Document :
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