DocumentCode
3648234
Title
Selecting two-bit bit flipping algorithms for collective error correction
Author
Dung Viet Nguyen;Bane Vasić;Michael W. Marcellin
Author_Institution
Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona 85721
fYear
2012
fDate
7/1/2012 12:00:00 AM
Firstpage
2881
Lastpage
2885
Abstract
A class of two-bit bit flipping algorithms for decoding low-density parity-check codes over the binary symmetric channel was proposed in [1]. Initial results showed that decoders which employ a group of these algorithms operating in parallel can offer low error floor decoding for high-speed applications. As the number of two-bit bit flipping algorithms is large, designing such a decoder is not a trivial task. In this paper, we describe a procedure to select collections of algorithms that work well together. This procedure relies on a recursive process which enumerates error configurations that are uncorrectable by a given algorithm. The error configurations uncorrectable by a given algorithm form its trapping set profile. Based on their trapping set profiles, algorithms are selected so that in parallel, they can correct a fixed number of errors with high probability.
Keywords
"Charge carrier processes","Decoding","Algorithm design and analysis","Iterative decoding","Vectors","Bipartite graph"
Publisher
ieee
Conference_Titel
Information Theory Proceedings (ISIT), 2012 IEEE International Symposium on
ISSN
2157-8095
Print_ISBN
978-1-4673-2580-6
Electronic_ISBN
2157-8117
Type
conf
DOI
10.1109/ISIT.2012.6284051
Filename
6284051
Link To Document