DocumentCode
3648583
Title
Reducing memory in high-speed packet classification
Author
Viktor Puš;Jan Kořenek
Author_Institution
CESNET, a.l.e., Zikova 4, 160 00 Prague 6, Czech Republic
fYear
2012
Firstpage
437
Lastpage
442
Abstract
Many packet classification algorithms were proposed to deal with the rapidly growing speed of computer networks. Unfortunately all of these algorithms are able to achieve high throughput only at the cost of excessively large memory and can be used only for small sets of rules. We propose new algorithm that uses four techniques to lower the memory requirements: division of rule set into subsets, removal of critical rules, prefix coloring and perfect hashing. The algorithm is designed for pipelined hardware implementation, can achieve the throughput of 266 million packets per second, which corresponds to 178Gb/s for the shortest 64B packets, and outperforms older approaches in terms of memory requirements by 66% in average for the rule sets available to us.
Keywords
"Memory management","Throughput","Algorithm design and analysis","Hardware","Vectors","IP networks","Field programmable gate arrays"
Publisher
ieee
Conference_Titel
Wireless Communications and Mobile Computing Conference (IWCMC), 2012 8th International
ISSN
2376-6492
Print_ISBN
978-1-4577-1378-1
Electronic_ISBN
2376-6506
Type
conf
DOI
10.1109/IWCMC.2012.6314244
Filename
6314244
Link To Document