DocumentCode :
3650035
Title :
Hardware implementation of an ultrasonic beamformer
Author :
G. Hampson;A. Paplinski
Author_Institution :
Found. for Res. in Astron., Dwingeloo, Netherlands
Volume :
1
fYear :
1997
Firstpage :
227
Abstract :
This paper describes a FPGA based implementation of a Phase Shift Beamformer. To obtain high-resolution real-time images a fixed-point word-parallel pipelined CORDIC processor is used to compute the large number of complex multiplications needed. Analogue pre-processing amplifies, demodulates and samples outputs from a 16 sensor ultrasonic array. Suitable sensor geometries enable two and three dimensional images to be formed. The resulting scalable architecture could be utilised in a multitude of applications including medical imaging, virtual reality tracking, robot navigation and exploration.
Keywords :
"Hardware","Sensor arrays","Field programmable gate arrays","Image sensors","Computational geometry","Computer architecture","Biomedical imaging","Virtual reality","Robot sensing systems","Medical robotics"
Publisher :
ieee
Conference_Titel :
TENCON ´97. IEEE Region 10 Annual Conference. Speech and Image Technologies for Computing and Telecommunications., Proceedings of IEEE
Print_ISBN :
0-7803-4365-4
Type :
conf
DOI :
10.1109/TENCON.1997.647299
Filename :
647299
Link To Document :
بازگشت