DocumentCode
3650605
Title
Multi-DSP implementation of a H.264/SVC decoder
Author
F. Pescador;A. Daian;I. Fernández;E. Juárez;M. Garrido
Author_Institution
Universidad Polité
fYear
2013
Firstpage
145
Lastpage
146
Abstract
In this paper, the implementation of a Multi-DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. An optimized single DSP-based decoder implementation has been splitted in two processes: the frame decoding (entropy decoding and motion compensation) and the deblocking filter. A multi-DSP device has been used to parallelize the execution of the processes. The performance has been measured using H.264/SVC sequences with different configurations.
Keywords
"Decoding","Static VAr compensators","Digital signal processing","Consumer electronics","Scalability","Standards","Entropy"
Publisher
ieee
Conference_Titel
Consumer Electronics (ISCE), 2013 IEEE 17th International Symposium on
ISSN
0747-668X
Print_ISBN
978-1-4673-6198-9
Type
conf
DOI
10.1109/ISCE.2013.6570153
Filename
6570153
Link To Document