DocumentCode :
3657202
Title :
Implementation of a frequency FIR filter as 2D-FIR filter based on FPGA
Author :
Ahmad Fakharian;Saeed Badr;Mohsen Abdi
Author_Institution :
Faculty of Electrical, Biomedical and Mechatronic Engineering Qazvin Branch, Islamic Azad University Qazvin, Iran
fYear :
2015
fDate :
4/12/2015 12:00:00 AM
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, it is tried to transfer one of the powerful tools for image processing from the frequency domain to spatial domain. In which the frequency concepts is used in the field of image processing based on FPGA. The process is as follows that first a low-pass FIR filter in frequency domain is designed and then it is transferred from frequency domain to spatial domain and implemented as an IP Core standard structure in FPGA. The implemented IP CORE structure is streaming and the input and output images of type gray. Because the use of array and high-frequency processing in FPGA, it has wide applications in image processing field, especially for highspeed image processing. Finally, the implementation of 2D FIR filter and eyewitness in VGA´s output and the comparison between the actual image and filtered image, it is obvious that high-frequency changes are decreased in the image.
Publisher :
ieee
Conference_Titel :
AI & Robotics (IRANOPEN), 2015
Type :
conf
DOI :
10.1109/RIOS.2015.7270745
Filename :
7270745
Link To Document :
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