• DocumentCode
    3659197
  • Title

    Challenges of 3D VLSI-CoolCubeTM process with p-Ge-OI and n-InGaAs-OI for ultimate CMOS nodes

  • Author

    F. Nemouchi;L. Hutin;H. Boutry;P. Rodriguez;E. Ghegin;J. Borrel;Y. Morand;S. Kerdiles;P. Batude;M. Vinet

  • Author_Institution
    CEA, Leti, Minatec Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9 - France
  • fYear
    2015
  • fDate
    6/1/2015 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this paper, we evaluate the various technological solutions and roadblocks for co-integrating p-Ge and n-InGaAs MOSFETs in a 3-D monolithic CoolCubeTM technology. In particular, the process sequence (Ge-p-MOS-1st or III-V-n-MOS-1st) is examined in the light of thermal budget limitations arising from junctions definition.
  • Keywords
    "Junctions","Indium gallium arsenide","Three-dimensional displays","Epitaxial growth","Doping","Plasma temperature","Silicon"
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop (SNW), 2015
  • Type

    conf

  • Filename
    7275332
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3659197