FPGA implementation of multiplication algorithms for ECC

Various cryptographic techniques use finite field multiplication. An efficient implementation of finite field multiplication is essential. Especially, elliptic curve cryptography (ECC), which provides high security with shorter key lengths, requires many multiplications during encryption and decryption phases. It is imperative to choose a faster and less resource consuming multiplier. Many algorithms have been proposed for the implementation of finite field multiplication in the literature. This paper discusses three different multiplication algorithms: Sunar-Koc, Karatsuba and Booth. The same have been implemented using Xilinx Virtex-7 family XC7V2000T-1FLG1925 FPGA device and a comparison in terms of time and resource utilization have been presented. All the three algorithms have been implemented for the key lengths of 194-, 233- and 384- bits. Similar key lengths are used in ECC.