Noise-robust hardware implementation of neural networks

Efficient hardware implementations of neural networks are of high interest. Stochastic computing is an alternative to conventional digital logic that allows to exploit the intrinsic parallelism of neural networks using few hardware resources. We present a new stochastic methodology that extends the capabilities of classical stochastic computing. In particular, the present approach exhibits practically total immunity to noise. This is demonstrated evaluating the influence of the noise on the system´s performance for a mathematical regression task.