Reduced-latency architecture for image smoothing exponential filters

Smoothing filters are low pass filters commonly used to reduce the details levels in image processing. This work suggests the use of a special family of low pass filters, namely the linear-phase exponential filters to perform image smoothing. The linear-phase exponential filters are used because they can be recursively implemented, which results in significant hardware savings. This work´s contribution is a novel architecture to efficiently implement those filters. The suggested architecture achieves symmetric extension with a reduced overall latency in the filtering process of M cycles, where M is the size of the symmetrically extended data. Simulation results show that the fixed-point implementation of the suggested architecture achieves high PSNR when compared to the floating-point implementation of the conventional non recursive FIR implementation of the same filter with pre-filtering symmetric extension. The suggested architecture requires a constant number of logic functions regardless of the filter size. Only the number of registers increases as a function with the size of the filter.