STG-based detection of power virus inputs in FSM

Finding input sequences that cause switching activity burst (power virus) and consequently peak power dissipation is an essential issue in design of sequential digital circuits. This paper presents a novel technique for computing the power virus inputs from the very first step of the synthesis flow where the finite state machine is typically described in the form of Signal Transition Graph (STG) and each state is represented in a symbolic form. Evaluations show that the proposed technique is simple yet effective.