Chopper stabilized sub 1V reference voltage in 65nm CMOS

A sub 1V reference circuit is proposed, that exploits the CTAT and PTAT voltages in the beta multiplier circuit to attain a stable voltage with temperature and power supply. A one-time calibration is integrated in the architecture to get a good performance over process. Further, chopper stabilization is proposed in the circuit itself rather than in the OTA to acheive a 4.8x reduction in integrated flicker noise voltage without increasing power dissipation. The prototype designed in TSMC´s 65nm general purpose CMOS for 236mV nominal voltage, shows a temperature coefficient of 18 ppm/°C from -40 to 100°C with a power supply ranging from 0.8 to 2V while consuming 16μA current. Simulated variation in the reference voltage is 0.7mV with power supply at nominal temperature.