Real-time VLSI architecture for palm rejection using Wronskian Determinant

Several Human Interface Technology applications require reliable palm rejection. Palm rejection in upcoming touch or Pad technology has a need of hardware implementation with requirements of low power and small area. This paper introduces a hardware implementation of a real-time palm rejection based on Wronskian Determinant. This detection algorithm offers regularity, low complexity and accuracy as well as robustness against global illumination changes. The proposed architecture is able to process incoming frames on-the-fly, therefore requiring a small amount of memory. The maximum frame rate is 15 fps, however the implementation is flexible enough to allow analysis of less frames if required. Processing unit consist of a basic processing element implemented in pipeline fashion and adder tree to produce final results. The architecture was implemented using a XCV800 FPGA. The power consumption of the whole system is 93 mW.