Silicon Mach-Zehnder Interferometer modulator with PAM-4 data modulation at 64 Gb/s

This paper outlines the co-design and simulation of the photonics and electronics circuits for an optical modulator implementing a 4-level phase amplitude modulation scheme at 64 Gb/s. The photonics circuit is designed for an SOI process with a 300 nm top Si layer and is based on a Mach-Zehnder Interferometer architecture modulator using carrier depletion. The CMOS driver circuit employs two on-chip PRBS sources and tunable delay pre-driver segments. This driver is flip-chip bonded to the photonics die to complete the packaging. Details of the model are outlined below and a simulated optical eye diagram is presented.