• DocumentCode
    3662918
  • Title

    FPGA based image processing unit

  • Author

    Dhanabal R;Sarat Kumar Sahoo; Bharathi V;Bh.S.R. Phanindra Varma;D. Kalyan;V. Divya

  • Author_Institution
    VIT University, Vellore, Tamil Nadu 632014, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In the field of medicine, services based on multimedia and arts Image processing plays a crucial role. The important solution to enhance the quality of systems linked to image processing is hardware based processing of an image. In this a discussion about implementation of coin counting and simulated result by the help of a language for description of hardware, verilog was done. Algorithm for step wise implementation of Brightness manipulation, Operating Threshold and Contrast stretching is implemented which gives an efficient implementation than normal edge detecting kind of counting coins.
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Systems and Control (ISCO), 2015 IEEE 9th International Conference on
  • Type

    conf

  • DOI
    10.1109/ISCO.2015.7282380
  • Filename
    7282380