• DocumentCode
    3664200
  • Title

    Efficient Estimation of Non-stationary Traffic Parameters on Networks-on-Chip

  • Author

    Abhishek Bansal;Sambhav Gupta;Turbo Majumder

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol., Delhi, New Delhi, India
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    425
  • Lastpage
    433
  • Abstract
    The network-on-chip (NoC) paradigm, by virtue of the scalability and modularity it offers, enables massive scale of integration of cores on a chip. However, design and application parameters such as network topology, problem partitioning and mapping, routing protocols, communication intensity, etc. Have a major impact on the actual latency, energy and thermal performance of the NoC. Conventional traffic models that assume Poisson arrivals of messages at each node of the NoC are inadequate in capturing the traffic dynamics of real applications with non-stationary statistics. The time-varying nature of the latter poses a formidable challenge in the process of calculation and estimation of traffic "fitness" parameters whose knowledge can be used to improve performance, energy consumption and thermal behavior. In this paper, we propose an efficient method of calculating and estimating these parameters on a NoC-based multicore without significant hardware overhead, while achieving more than 97% accuracy.
  • Keywords
    "Clocks","Estimation","Routing","Taylor series","Mathematical model","Multicore processing","Hardware"
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium Workshop (IPDPSW), 2015 IEEE International
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2015.62
  • Filename
    7284341