Title :
Key process development on 300mm wafer for 2.5D/3D integration
Author :
Chongshen Song;Kai Xue;Feng Jiang;Hengfu Li;Guangjian Feng;Xiangmeng Jing;W. Zhang
Author_Institution :
National Center for Advanced Packaging Co., Ltd, Wuxi 214135, Jiangsu Province, China
fDate :
6/1/2015 12:00:00 AM
Abstract :
2.5D/3D integration has been attracting both academic and industry interests for extending the Moore´s Low in recent years and several products using such technology have been emerged. This paper introduces the development progress of key process modules for 2.5D/3D IC integration on our 300mm platform. Experiment results for high aspect ratio TSV formation, fine-pitch RDL & bumping, low cost backside TSV revealing, and wafer level conductive bonding are given. The application of 2.5D/3D TSV integration is also discussed.
Keywords :
"Conferences","Electron devices","Solid state circuits"
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on
Print_ISBN :
978-1-4799-8362-9
DOI :
10.1109/EDSSC.2015.7285095
