Factory acceptance test of a five-terminal MMC control and protection system using hardware-in-the-loop method

Being the first five-terminal Modular Multilevel Converter (MMC)-based HVDC project in the world, the control and protection system must be validated under various operation modes as well as contingency at the factory acceptance test. This paper presents the configuration and performance of a hardware-in-the-loop (HIL) test platform that is based on a multi-rate real-time simulator using commercial-off-the-shelf architecture. The MMC sub-module model is implemented in field programmable gate array (FPGA) boards with a computation cycle of 500 ns, while the rest of the power system is simulated on the central processing unit (standard multi-core CPU) with a time-step of 30 μs. The State-space Nodal (SSN) interface is used to couple the models simulated on FPGA and on CPU. In addition, a communication protocol based on Giga-bit Ethernet is designed to connect the actual valve balancing controller with the real-time simulator. Results from the factory acceptance test are presented in this paper.