A circuit model for a Si-based biomimetic synaptic time-keeping device

Spike time dependent plasticity (STDP) is synaptic conductivity modulation which is dependent upon the time difference between pre- and post-synaptic neuronal spikes. Superposition of extended waveforms from pre- and post-synaptic neurons has been proposed to apply a pre- vs. post-neuron spike time difference dependent voltage across an RRAM based synapse to implement STDP. Such long waveforms are power-intensive. We have recently proposed an equivalent synaptic time-keeping based on impact ionization based NPN diode (I-NPN). Here the time difference between sharp pre- and post-neuronal spikes enables conductance change due to the internal charge carrier dynamics of I-NPN device. Such an approach is low power and biomimetic. In this paper, we propose a SPICE model of the I-NPN device. The model is able to emulate DC, transient and pulse train response of I-NPN diode. STDP is demonstrated. The SPICE simulations are much faster than TCAD, thus enabling circuit level simulation of neural network. Such a circuit model is essential for the evaluation of the impact of device characteristics on the learning performance of neuromorphic circuits which will provide essential device specification and enable learning efficiency benchmarking.