DocumentCode :
3668671
Title :
Identification and extraction of all real axis poles and zeros in RC and RL circuits
Author :
Reza Hashemian
fYear :
2015
fDate :
5/1/2015 12:00:00 AM
Firstpage :
397
Lastpage :
403
Abstract :
A graphical/numerical technique is presented for the extraction of roots (poles and zeros) of RC and RL circuits, where the roots lay on the real axis in the s-plane. The method constructs a corresponding LC circuit for the RC or RL circuit, and as demonstrated, all real axis roots are shifted to the jω axis, where the swiping-frequency signals exit. The process takes place in two steps: in the first step the roots in the real axis RHP (RRHP), if any, are mirrored to the real axis LHP (RLHP), and in the second step the roots on the RLHP are moved to the jω axis. It is also shown that the magnitude of the corresponding roots in the two circuits, RC (or RL) and the corresponding LC, relate by a scaling factor log(ωC) = log(ωR)/2.
Keywords :
"Poles and zeros","Capacitors","Inductors","Resistance","Capacitance","Band-pass filters"
Publisher :
ieee
Conference_Titel :
Electro/Information Technology (EIT), 2015 IEEE International Conference on
Electronic_ISBN :
2154-0373
Type :
conf
DOI :
10.1109/EIT.2015.7293375
Filename :
7293375
Link To Document :
بازگشت