Energy efficient partitioning of dynamic reconfigurable MRAM-FPGAs

Emerging non-volatile Magnetic Random Access Memory (MRAM) is a promising alternative for replacement of SRAM-based configuration bits of conventional FPGAs. However, the costs of reconfiguration in MRAM-FPGAs are typically higher than SRAM-FPGAs due to the high write latency and energy of MRAM. In this paper, a novel energy-efficient partitioning technique is proposed to minimize the number of reconfigurations and content updates for dynamic reconfigurable MRAM-FPGAs. The simulation results show that the proposed technique significantly reduces the reconfiguration energy (up to 68.1% on average) as compared to the existing partitioning techniques.