DocumentCode
3670718
Title
Design of the 16bit ΔΣ converter for sensor signal processing
Author
Michal Pavlík;Vilém Kledrowetz;Marián Pristach;Marek Bohrn;Lukas Fujcik;Jiří Háze
Author_Institution
Brno University of technology, Technická
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
713
Lastpage
716
Abstract
The paper deals with a design of the 16-bit MASH Delta-sigma (ΔΣ) converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.
Keywords
"Modulation","Operational amplifiers","Multi-stage noise shaping","Capacitors","Gain","Bandwidth","Switches"
Publisher
ieee
Conference_Titel
Telecommunications and Signal Processing (TSP), 2015 38th International Conference on
Type
conf
DOI
10.1109/TSP.2015.7296356
Filename
7296356
Link To Document