• DocumentCode
    3670764
  • Title

    Designing the FPGA-based system for Triangle Phase space Mapping (TPSM) of heart rate variability (HRV) signal

  • Author

    Shahab Rezaei;Sadaf Moharreri;Ali Ghorshi

  • Author_Institution
    International Campus of Sharif University of Technology, Kish Island, Iran
  • fYear
    2015
  • fDate
    7/1/2015 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    There has been an increasing interest in telemonitoring thanks to the availability of new technologies for data transmission and processing with better performances and lower costs. In this paper, we try to develop and implement the HRV signal processing into a Field Programmable Gate Array (FPGA). The hardware implementing algorithm was developed in Verilog Hardware Description Language (HDL). In designed hardware, after defining the number of samples in the input, we extract and analyses the Triangular Phase Space Mapping (TPSM), a novel method for representation of heart rate. The performance of the system was tested using MATLAB and validated based on the input signals.
  • Keywords
    "Heart rate variability","Feature extraction","Field programmable gate arrays","Hardware","System-on-chip","Hardware design languages"
  • Publisher
    ieee
  • Conference_Titel
    Telecommunications and Signal Processing (TSP), 2015 38th International Conference on
  • Type

    conf

  • DOI
    10.1109/TSP.2015.7296403
  • Filename
    7296403