Comparative performance study of SPEC INT 2006 benchmarks on nehalem, sandybridge and haswell microarchitectures

Microarchitecture enhancements are incorporated in each generation of across multiple units of the microprocessor. It is important to understand the impact of microarchitecture enhancements on workload performance. The internal organization of the modern superscalar out-of-order microprocessor is partitioned into two key sections - the front-end and the back-end. The front-end fetches, decodes and dispatches the instructions, and the back-end fetches the required data and executes the instructions. In this paper we have studied three generations of Intel (tock) microarchitecture improvements for SPEC INT 2006 workloads and categorized the improvements to both front-end and back-end optimizations using a cycle-based accounting methodology. We have also presented a high level instruction mix and generic microarchitecture characteristics across these three platforms.