Dynamic threshold voltage influence on Ge pMOSFET hysteresis

This paper presents for the first time an experimental analysis of germanium pMOSFETs operating in conventional, dynamic threshold voltage (DT, where V_BS = V_GS) and enhanced dynamic threshold voltage (eDT, where V_BS=k*V_GS) modes. In addition, there are two different HfO₂/Al₂O₃ gate stack thicknesses under evaluation. The subthreshold swing (SS) improves 60% in eDT (k = 2) mode compared to the conventional mode (k = 0) thanks to the dynamic threshold voltage reduction. The thinnest Al₂O₃ layer presents higher drain current hysteresis in the conventional mode and it increases when the channel length decreases. In contrast, the hysteresis effect reduces from 67 mV to lower than 4 mV, i.e. practically minimized when the dynamic threshold voltage is applied.