DocumentCode :
3672938
Title :
Surfing front-end architectures for ultrasound imaging systems
Author :
Peng Wang;Trond Ytterdal;Thomas M. Halvorsr⊘d
Author_Institution :
Department of Electronics and Telecommunications, Norwegian University of Science and Technology, Trondheim, Norway
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes two surfing architectures of the front-end for cardiac ultrasound imaging systems by removing the high voltage (HV) transmitter/receiver (Tx/Rx) switch in traditional ultrasound imaging systems, and connecting the input and the local ground of the Rx to the output of the Tx directly. Both advantages and challenges are presented. During the emitting phase, the Rx is on reset mode and voltages at all internal nodes in the Rx will follow the transmitting pulse, and this phenomenon exhibits the Rx is in the surf as the transmitting pulse. By removing the Tx/Rx switch, the Rx can avoid saturating status during the pulse emitting phase in Tx, and can receive the reflected echo signals in an efficient way after the emitting phase. While the input of the Rx connecting to the PZT transducer directly without the Tx/Rx switch, the received echo signals will not be distorted by the Tx/Rx switch, and the switched-capacitor (SC) front-end of the Rx can be relaxed in the design. Currently the bulk CMOS technology may not support this architecture because of its intrinsic process limitation and relatively large parasitic capacitance of the PN junctions. SOI CMOS technology could be a feasible CMOS technology because its parasitic capacitance of the PN junction is much smaller and its process is different from the bulk CMOS technology. The simulation is based on an inverter-based SC amplifier in a high voltage 0.18 μm 50 V/1.8 V bulk CMOS technology, and a HV switch is based on a model which cannot be implemented in a bulk CMOS technology.
Keywords :
"CMOS integrated circuits","Ultrasonic imaging","Switches","CMOS technology","Imaging","Substrates","Parasitic capacitance"
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design (ECCTD), 2015 European Conference on
Type :
conf
DOI :
10.1109/ECCTD.2015.7300006
Filename :
7300006
Link To Document :
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