• DocumentCode
    3673742
  • Title

    Design of current-controlled current conveyor stage with systematic current offset reduction

  • Author

    Roman Sotner;Roman Prokop;Jan Jerabek;Vilem Kledrowetz;Lukas Fujcik;Tomas Dostal

  • Author_Institution
    Faculty of Electrical Engineering and Communication, Brno University of Technology, Czech Republic
  • fYear
    2015
  • Firstpage
    225
  • Lastpage
    228
  • Abstract
    This contribution presents modification of current-controlled current conveyor (CCCII) designed in order to reduce the systematic DC current offset of transfer between X and Z terminal and also an example of practical design including practical guideline and recommendations. Simulations in Cadence Spectre simulator with ON Semiconductor/AMIS I2T100 based on 0.7 μm technology CMOS07 were provided for verification of discussed features.
  • Keywords
    "Transistors","Systematics","Mirrors","Standards","CMOS integrated circuits","Fingers","Signal processing"
  • Publisher
    ieee
  • Conference_Titel
    Applied Electronics (AE), 2015 International Conference on
  • ISSN
    1803-7232
  • Print_ISBN
    978-8-0261-0385-1
  • Type

    conf

  • Filename
    7301093
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3673742