A low-power 64×64 ASIC 2-bit digital correlator

The massively parallel high-speed correlators required for Fourier aperture synthesis can be among the primary drivers of power consumption in synthetic thinned-aperture radiometers. Power consumption by digital correlation operations among upwards of thousands of input pairs using FPGA architecture is a significant burden for existing ground-based systems and prohibitively high for satellite-based systems. For example, the ALMA telescope correlates among 66 antennas. The proposed Geostationary Synthetic Thinned Aperture Radiometer (GeoSTAR) for atmospheric microwave sounding would correlate a Y-array with 128 receivers per arm, which necessitates efficiency on the order of hundreds of microwatts per correlator element. A 2-bit digital correlator using an ASIC platform has been designed for use in a GeoSTAR prototype. An efficiency of less than 800 µW/correlation cell over a 64×64 cross-correlation matrix in a 21mm × 21mm BGA package makes the chip adaptable to variety of synthetic aperture radiometry applications where very low power consumption is required.