V-band integrated on-chip antenna implemented with a partially reflective surface in standard 0.13-µm BiCMOS technology

This paper presents a V-band on-chip triangular planar monopole antenna using IBM 0.13-μm BiCMOS technology. A partially reflective surface (PRS), which is realized with a dual-layered Gangbuster type-4 FSS structure, is exploited to increase the antenna frequency bandwidth, radiation efficiency and gain. The overall size of the antenna, including the PRS, is 0.86 mm². The measured S₁₁ is smaller than -17 dB from 54 to 66 GHz, while the maximum measured antenna gain is 1.42 dB at 69.5 GHz. The maximum simulated antenna efficiency is 41% at 65 GHz.