DocumentCode :
3677807
Title :
Simulation Study of Dual-Gate Trench LDMOSFET on 4H-SiC
Author :
Yashvir Singh;Deepak Dwivedi
Author_Institution :
Dept. of Electron. &
fYear :
2015
fDate :
5/1/2015 12:00:00 AM
Firstpage :
174
Lastpage :
177
Abstract :
In this work, we propose a new structure for lateral diffused power metal-oxide semiconductor field-effect transistor (LDMOSFET) on 4H-SiC. The device consists of two-gate electrodes in which one gate is placed on the surface horizontally whereas other gate is built in a trench vertically. Both the gates are used for formation of separate channel in the LDMOSFET which conduct the drain current in parallel. Another trench filled with oxide is located in the drift region to enhance reduced surface electric field (RESURF) effect. Parallel conduction of two channels with reduced electric field leads to substantial improvement in the device performance. The performance of modified structure along with conventional LDMOSFET is evaluated using two dimensional simulations in the device simulator (SILVACO ATLAS). It is demonstrated that the proposed structure provides 56% improvement in output current, 60% improvement in transconductance, 120% increase in breakdown voltage, and four times higher figure-of-merit over the conventional device for same cell pitch.
Keywords :
"Logic gates","Transconductance","Silicon carbide","Threshold voltage","Electric breakdown","MOSFET","Performance evaluation"
Publisher :
ieee
Conference_Titel :
Advances in Computing and Communication Engineering (ICACCE), 2015 Second International Conference on
Print_ISBN :
978-1-4799-1733-4
Type :
conf
DOI :
10.1109/ICACCE.2015.50
Filename :
7306673
Link To Document :
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