Impact analysis of different inputs and outputs block sizes of DFT-SCFDMA system

The Bit Error Rate (BER) and Peak to Average Power Ratio (PAPR) are the major concerns for wireless communication. This paper aims to analyze these two important parameters for different inputs and outputs block sizes of the discrete Fourier transform (DFT) based single carrier frequency division multiple access (SCFDMA) system by using the conventional raised cosine (RC) and square root raised cosine (RRC) pulse shaping filters for different sub-carrier mapping schemes (e.g. interleaved frequency division multiple access (IFDMA), localized frequency division multiple access (LFDMA) and distributed frequency division multiple access (DFDMA)). Note that DFT based SCFDMA system is being adopted for uplink communication in the long term evolution (LTE) for its lower PAPR. The suitable block size of SCFDMA is crucial to improve wireless communication performances in terms of BER and PAPR, because if the block sizes vary then the PAPR also changes. Therefore, this paper analyzes the impact of the input and output block sizes of the system on enhancement of the system performances. Taking help from the numerical analysis and evaluation, this paper shows the way to choose the proper input and output block size to have a significantly lower PAPR and BER.