DocumentCode :
3678278
Title :
Gate length scaling of Si nanowire FET: A NEGF study
Author :
Touhid Khan;Hossain Md. Iztihad;Abu Sufian;Md. Nur Kutubul Alam;Md. Nurunnabi Mollah;Md. Rafiqul Islam
Author_Institution :
Dept. of Electrical and Electronic Engineering, Khulna University of Engineering &
fYear :
2015
fDate :
5/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
4
Abstract :
Here we report effects of gate length (Lg) scaling on the ballistic performance of a Si nanowire (NW) FET using three dimensional quantum simulation. Three different gate length 10nm, 12nm & 15nm are analyzed while 3nm diameter of the NW are taken. Current-Voltage characteristic is obtained by self-consistently solving the Non Equilibrium Greens Function (NEGF) transport equation with Poisson´s equation. The result is obtained at <;001> channel orientation. The simulation result shows that the drain current decreases and the threshold voltage increases with increase of gate length. But the subthreshold swing (SS) decreases with it. It reveals that the electrostatic control of the gate becomes poorer with decrease in gate length.
Keywords :
"Logic gates","Field effect transistors","Silicon","Metals","Threshold voltage"
Publisher :
ieee
Conference_Titel :
Electrical Engineering and Information Communication Technology (ICEEICT), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICEEICT.2015.7307505
Filename :
7307505
Link To Document :
بازگشت